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» Place storming: performing new technologies in context
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IEEEPACT
2008
IEEE
14 years 3 months ago
Multitasking workload scheduling on flexible-core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
SIGARCH
2008
107views more  SIGARCH 2008»
13 years 9 months ago
Multitasking workload scheduling on flexible core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
MICRO
2007
IEEE
144views Hardware» more  MICRO 2007»
14 years 3 months ago
Process Variation Tolerant 3T1D-Based Cache Architectures
Process variations will greatly impact the stability, leakage power consumption, and performance of future microprocessors. These variations are especially detrimental to 6T SRAM ...
Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David Bro...
COOPIS
2004
IEEE
14 years 24 days ago
Dynamic Access Control for Ubiquitous Environments
Current ubiquitous computing environments provide many kinds of information. This information may be accessed by different users under varying conditions depending on various conte...
Jehan Wickramasuriya, Nalini Venkatasubramanian
DAC
2005
ACM
14 years 10 months ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...