18 search results - page 3 / 4 » Pointer cache assisted prefetching |
PLDI
1999
ACM
14 years 1 days ago
1999
ACM
Hardware trends have produced an increasing disparity between processor speeds and memory access times. While a variety of techniques for tolerating or reducing memory latency hav...
CIKM
1995
Springer
13 years 11 months ago
1995
Springer
Speculative service implies that a client's request for a document is serviced by sending, in addition to the document requested, a number of other documents (or pointers the...
LCTRTS
2009
Springer
14 years 2 months ago
2009
Springer
Instruction fetch behavior has been shown to be very regular and predictable, even for diverse application areas. In this work, we propose the Lookahead Instruction Fetch Engine (...
IEEEPACT
2006
IEEE
14 years 1 months ago
2006
IEEE
Modern out-of-order processors with non-blocking caches exploit Memory-Level Parallelism (MLP) by overlapping cache misses in a wide instruction window. The exploitation of MLP, h...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
— Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular a...