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FM
2001
Springer
108views Formal Methods» more  FM 2001»
13 years 12 months ago
Improvements in BDD-Based Reachability Analysis of Timed Automata
To develop efficient algorithms for the reachability analysis of timed automata, a promising approach is to use binary decision diagrams (BDDs) as data structure for the representa...
Dirk Beyer
DATE
2007
IEEE
154views Hardware» more  DATE 2007»
14 years 1 months ago
Soft error rate analysis for sequential circuits
Due to reduction in device feature size and supply voltage, the sensitivity to radiation induced transient faults (soft errors) of digital systems increases dramatically. Intensiv...
Natasa Miskov-Zivanov, Diana Marculescu
CHARME
2005
Springer
176views Hardware» more  CHARME 2005»
14 years 1 months ago
An Analysis of SAT-Based Model Checking Techniques in an Industrial Environment
Abstract. Model checking is a formal technique for automatically verifying that a finite-state model satisfies a temporal property. In model checking, generally Binary Decision D...
Nina Amla, Xiaoqun Du, Andreas Kuehlmann, Robert P...
TACAS
2010
Springer
181views Algorithms» more  TACAS 2010»
14 years 2 months ago
Boom: Taking Boolean Program Model Checking One Step Further
Abstract. We present Boom, a comprehensive analysis tool for Boolean programs. We focus in this paper on model-checking non-recursive concurrent programs. Boom implements a recent ...
Gérard Basler, Matthew Hague, Daniel Kroeni...
FMCAD
2008
Springer
13 years 9 months ago
Automatic Non-Interference Lemmas for Parameterized Model Checking
Parameterized model checking refers to any method that extends traditional, finite-state model checking to handle systems arbitrary number of processes. One popular approach to thi...
Jesse D. Bingham