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MICRO
2002
IEEE
117views Hardware» more  MICRO 2002»
13 years 8 months ago
Drowsy instruction caches: leakage power reduction using dynamic voltage scaling and cache sub-bank prediction
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potentia...
Nam Sung Kim, Krisztián Flautner, David Bla...
MICRO
2010
IEEE
140views Hardware» more  MICRO 2010»
13 years 6 months ago
STEM: Spatiotemporal Management of Capacity for Intra-core Last Level Caches
Efficient management of last level caches (LLCs) plays an important role in bridging the performance gap between processor cores and main memory. This paper is motivated by two key...
Dongyuan Zhan, Hong Jiang, Sharad C. Seth
PEPM
2010
ACM
14 years 5 months ago
Context-sensitive analysis of obfuscated x86 executables
A method for context-sensitive analysis of binaries that may have obfuscated procedure call and return operations is presented. Such binaries may use operators to directly manipul...
Arun Lakhotia, Davidson R. Boccardo, Anshuman Sing...
CORR
2002
Springer
131views Education» more  CORR 2002»
13 years 8 months ago
Ownership Confinement Ensures Representation Independence for Object-Oriented Programs
for data abstraction and justifies reasoning by simulation. Representation independence has been shown for a variety of languages and constructs but not for shared references to mu...
Anindya Banerjee, David A. Naumann
CHI
2008
ACM
14 years 9 months ago
Video browsing by direct manipulation
We present a method for browsing videos by directly dragging their content. This method brings the benefits of direct manipulation to an activity typically mediated by widgets. We...
Pierre Dragicevic, Gonzalo Ramos, Jacobo Bibliowit...