In cache based multiprocessors a protocol must maintain coherence among replicated copies of shared writable data. In delayed consistency protocols the effect of out-going and in-...
Because of increasing hardware and software complexity, the running time of many computational science applications is now more than the mean-time-to-failure of highpeformance com...
Greg Bronevetsky, Daniel Marques, Keshav Pingali, ...
The paper presents the implementation of a railway control system, as a means of assessing the potential of coordination languages to be used for modelling software architectures f...
system during a single processor cycle. But we can abstract out properties of the sequences and focus on the properties of interest. The "specifications" given here are i...
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...