261 search results - page 16 / 53 » Polymorphic wavelet architectures using reconfigurable hardw... |
IPPS
2005
IEEE
2005
IEEE
A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms
14 years 1 months ago
In this paper, we describe a prototype software framework that implements a formalized methodology for partitioning computational intensive applications between reconfigurable har...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
Mobile video processing as defined in standards like MPEG-4 and H.263 contains a number of timeconsuming computations that cannot be efficiently executed on current hardware archi...
TC
2010
13 years 2 months ago
2010
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
FPGA
2001
ACM
13 years 12 months ago
2001
ACM
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents the design and study of reconfigurable architectures for two data-link layer frame delineation techniques used for ATM and GFP. The architectures are targeted ...