Process variation affects processor pipelines by making some stages slower and others faster, therefore exacerbating pipeline unbalance. This reduces the frequency attainable by t...
Abhishek Tiwari, Smruti R. Sarangi, Josep Torrella...
In this paper, we present a compiler strategy to optimize data accesses in regular array-intensive applications running on embedded multiprocessor environments. Specifically, we p...
Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhar...
This paper describes BiSNET (Biologically-inspired architecture for Sensor NETworks), which addresses several key issues in multi-modal wireless sensor networks such as autonomy, ...
Combining high performance with low power consumption is becoming one of the primary objectives of processor designs. Instead of relying just on sleep mode for conserving power, a...
— Wireless sensor networks have attracted significant interest for various scientific, military, and e-health applications. Recently a new class of sensor networks “sensor/ac...