Sciweavers

354 search results - page 65 / 71
» Power Awareness in Network Design and Routing
Sort
View
CIKM
2006
Springer
13 years 11 months ago
KDDCS: a load-balanced in-network data-centric storage scheme for sensor networks
We propose an In-Network Data-Centric Storage (INDCS) scheme for answering ad-hoc queries in sensor networks. Previously proposed In-Network Storage (INS) schemes suffered from St...
Mohamed Aly, Kirk Pruhs, Panos K. Chrysanthis
MICRO
2009
IEEE
99views Hardware» more  MICRO 2009»
14 years 2 months ago
Low-cost router microarchitecture for on-chip networks
On-chip networks are critical to the scaling of future multicore processors. The challenge for on-chip network is to reduce the cost including power consumption and area while pro...
John Kim
MOBIHOC
2007
ACM
14 years 7 months ago
Cross-layer latency minimization in wireless networks with SINR constraints
Recently, there has been substantial interest in the design of crosslayer protocols for wireless networks. These protocols optimize certain performance metric(s) of interest (e.g....
Deepti Chafekar, V. S. Anil Kumar, Madhav V. Marat...
EUROMICRO
1997
IEEE
13 years 12 months ago
The Harpoon security system for helper programs on a Pocket Companion
In this paper we present a security framework for executing foreign programs, called helpers, on a Pocket Companion: a wireless hand-held computer. A helper program as proposed is...
Gerard J. M. Smit, Paul J. M. Havinga, Daniël...
TON
2008
125views more  TON 2008»
13 years 7 months ago
Two techniques for fast computation of constrained shortest paths
Abstract-- Computing constrained shortest paths is fundamental to some important network functions such as QoS routing, which is to find the cheapest path that satisfies certain co...
Shigang Chen, Meongchul Song, Sartaj Sahni