Sciweavers

462 search results - page 29 / 93
» Power Efficient Data Cache Designs
Sort
View
VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
14 years 8 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
ISCA
1997
IEEE
93views Hardware» more  ISCA 1997»
14 years 12 hour ago
The Energy Efficiency of IRAM Architectures
Portable systems demand energy efficiency in order to maximize battery life. IRAM architectures, which combine DRAM and a processor on the same chip in a DRAM process, are more en...
Richard Fromm, Stylianos Perissakis, Neal Cardwell...
HOTDEP
2008
168views Hardware» more  HOTDEP 2008»
13 years 10 months ago
A Spin-Up Saved Is Energy Earned: Achieving Power-Efficient, Erasure-Coded Storage
Storage accounts for a significant amount of a data center's ever increasing power budget. As a consequence, energy consumption has joined performance and reliability as a do...
Kevin M. Greenan, Darrell D. E. Long, Ethan L. Mil...
SIGMOD
1994
ACM
175views Database» more  SIGMOD 1994»
14 years 16 days ago
Sleepers and Workaholics: Caching Strategies in Mobile Environments
In the mobile wireless computing environment of the future, a large number of users, equipped with low-powered palmtop machines, will query databases over wireless communication ch...
Daniel Barbará, Tomasz Imielinski
DAC
1997
ACM
14 years 1 days ago
Power Management Techniques for Control-Flow Intensive Designs
This paper presents a low-overhead controller-based power managementtechnique that re-specifies control signals to reconfigure existing multiplexer networks and functional units t...
Anand Raghunathan, Sujit Dey, Niraj K. Jha, Kazuto...