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VLSID
1993
IEEE
133views VLSI» more  VLSID 1993»
13 years 11 months ago
An Area-Efficient Systolic Architecture for Real-Time VLSI Finite Impulse Response Filters
An area-eficzent systolic architecture for realtime, programmable-coeBcient jinite impulse response (FIR)filters is presented. A technique called pipelined clustering is introduce...
V. Visvanathan, Nibedita Mohanty, S. Ramanathan
WWW
2007
ACM
14 years 8 months ago
Querying and maintaining a compact XML storage
As XML database sizes grow, the amount of space used for storing the data and auxiliary data structures becomes a major factor in query and update performance. This paper presents...
Raymond K. Wong, Franky Lam, William M. Shui
ISCAS
2011
IEEE
342views Hardware» more  ISCAS 2011»
12 years 10 months ago
Parallel Dynamic Voltage and Frequency Scaling for stream decoding using a multicore embedded system
—Parallel structures may be used to increase a system processing speed in case of large amount of data or highly complex calculations. Dynamic Voltage and Frequency Scaling (DVFS...
Ying-Xun Lai, Yueh-Min Huang, Chin-Feng Lai, Ljilj...
ASPLOS
2012
ACM
12 years 3 months ago
A case for unlimited watchpoints
Numerous tools have been proposed to help developers fix software errors and inefficiencies. Widely-used techniques such as memory checking suffer from overheads that limit thei...
Joseph L. Greathouse, Hongyi Xin, Yixin Luo, Todd ...
MSWIM
2009
ACM
14 years 2 months ago
An enhanced mechanism for efficient assignment of multiple MBMS sessions towards LTE
The provision of rich multimedia services, such as Mobile TV, is considered of key importance for the Long Term Evolution (LTE) proliferation in mobile market. To this direction, ...
Antonios G. Alexiou, Christos Bouras, Vasileios Ko...