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HPCA
2000
IEEE
13 years 11 months ago
PowerMANNA: A Parallel Architecture Based on the PowerPC MPC620
The paper presents PowerMANNA - a distributed-memory parallel computer system based on the 64-Bit PowerPC processor MPC620. The PowerMANNA node architecture supports all the sophi...
Peter M. Behr, S. Pletner, Angela C. Sodan
IBMRD
2007
47views more  IBMRD 2007»
13 years 7 months ago
Cell Broadband Engine processor vault security architecture
    Current data protection technologies such as those based on public‐key encryption and broadcast  encryption  focus  on  the  secure  control  and  prote...
Kanna Shimizu, H. Peter Hofstee, John S. Liberty
PACS
2000
Springer
99views Hardware» more  PACS 2000»
13 years 11 months ago
Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
Power dissipation is a major concern not only for portable systems, but also for high-performance systems. In the past, energy consumption and processor heating was reduced mainly...
Roberto Maro, Yu Bai, R. Iris Bahar
PIMRC
2010
IEEE
13 years 5 months ago
A green software-defined communication processor for dynamic spectrum access
Abstract--Dynamic spectrum access (DSA) supporting opportunistic transmission without extra spectrum bandwidth is attractive for future wireless communication. To facilitate such D...
Ching-Kai Liang, Kwang-Cheng Chen
MICRO
2006
IEEE
71views Hardware» more  MICRO 2006»
13 years 7 months ago
Efficient Runahead Execution: Power-Efficient Memory Latency Tolerance
Runahead execution improves memory latency tolerance without significantly increasing processor complexity. Unfortunately, a runahead execution processor executes significantly mo...
Onur Mutlu, Hyesoon Kim, Yale N. Patt