1238 search results - page 116 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
159
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PLDI
2011
ACM
14 years 9 months ago
2011
ACM
Exploiting today’s multiprocessors requires highperformance and correct concurrent systems code (optimising compilers, language runtimes, OS kernels, etc.), which in turn requir...
191
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EUROPAR
2010
Springer
15 years 7 months ago
2010
Springer
Abstract. Traditional parallel programming methodologies for improving performance assume cache-based parallel systems. However, new architectures, like the IBM Cyclops-64 (C64), b...
142
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
DPM (Dynamic Power Management) is an effective technique for reducing the energy consumption of embedded systems that is based on migrating to a low power state when possible. Whi...
153
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ICES
2005
Springer
15 years 11 months ago
2005
Springer
Abstract. There have been introduced a number of systems with evolvable hardware on a single chip. To overcome the lack of flexibility in these systems, we propose a single-chip e...
180
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IPPS
2002
IEEE
15 years 11 months ago
2002
IEEE
The increasing gap between processor and memory performance has led to new architectural models for memory-intensive applications. In this paper, we use a set of memory-intensive ...