1238 search results - page 14 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
168
click to vote
ASPLOS
2012
ACM
14 years 1 months ago
2012
ACM
To accomplish frequent, simple tasks with high efficiency, it is necessary to leverage low-power, microcontroller-like processors that are increasingly available on mobile systems...
139
click to vote
EUROPAR
2008
Springer
15 years 7 months ago
2008
Springer
Abstract. We describe compiler and run-time optimisations for effective autoparallelisation of C++ programs on the Cell BE architecture. Auto-parallelisation is made easier by anno...
154
click to vote
ICMCS
2006
IEEE
15 years 11 months ago
2006
IEEE
With increased concern for physical security, video surveillance is becoming an important business area. Similar camera-based system can also be used in such diverse applications ...
169
click to vote
ISCA
2005
IEEE
15 years 11 months ago
2005
IEEE
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
167
click to vote
IPPS
2007
IEEE
16 years 10 hour ago
2007
IEEE
1 Multi-paradigm, multi-threaded and multi-core computing devices available today provide several orders of magnitude performance improvement over mainstream microprocessors. These...