1238 search results - page 14 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
ASPLOS
2012
ACM
12 years 3 months ago
2012
ACM
To accomplish frequent, simple tasks with high efficiency, it is necessary to leverage low-power, microcontroller-like processors that are increasingly available on mobile systems...
EUROPAR
2008
Springer
13 years 9 months ago
2008
Springer
Abstract. We describe compiler and run-time optimisations for effective autoparallelisation of C++ programs on the Cell BE architecture. Auto-parallelisation is made easier by anno...
ICMCS
2006
IEEE
14 years 1 months ago
2006
IEEE
With increased concern for physical security, video surveillance is becoming an important business area. Similar camera-based system can also be used in such diverse applications ...
ISCA
2005
IEEE
14 years 1 months ago
2005
IEEE
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
1 Multi-paradigm, multi-threaded and multi-core computing devices available today provide several orders of magnitude performance improvement over mainstream microprocessors. These...