1238 search results - page 8 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
VLDB
2007
ACM
14 years 1 months ago
2007
ACM
In this paper we describe the design and implementation of CellSort − a high performance distributed sort algorithm for the Cell processor. We design CellSort as a distributed b...
ICS
2009
Tsinghua U.
13 years 5 months ago
2009
Tsinghua U.
This paper presents high-performance collective communication algorithms and implementations that exploit the unique architectural features of the Cell heterogeneous multicore pro...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
Abstract— The continuing divergence of processor and memory speeds has led to the increasing reliance on larger caches which have become major consumers of area and power in embe...
RSP
2000
IEEE
13 years 11 months ago
2000
IEEE
This paper describes a methodology for developing processor specific tools such as assemblers, disassemblers, processor simulators, compilers etc., using processor models in a ge...
ISLPED
2010
ACM
13 years 5 months ago
2010
ACM
Power has become the most critical design constraint for embedded handheld devices. This paper proposes a power-efficient SIMD architecture, referred to as Diet SODA, for DSP appl...