979 search results - page 158 / 196 » Power Macromodeling for High Level Power Estimation |
DATE
2010
IEEE
14 years 2 months ago
2010
IEEE
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
DATE
2010
IEEE
14 years 2 months ago
2010
IEEE
: Scaling down in very deep submicron (VDSM) technologies increases the delay, power consumption of on-chip interconnects, while the reliability and yield decrease. In high perform...
IFL
2001
Springer
14 years 1 months ago
2001
Springer
In order to achieve a high level of abstraction, array-oriented languages provide language constructs for defining array operations in a shape-invariant way. However, when trying ...
ICMCS
2000
IEEE
14 years 1 months ago
2000
IEEE
Relevance feedback [1] has been a powerful tool for interactive Content-Based Image Retrieval (CBIR). During the retrieval process, the user selects the most relevant images and p...
IPPS
1998
IEEE
14 years 1 months ago
1998
IEEE
This paper presents reduction recognition and parallel code generationstrategies for distributed-memorymultiprocessors. We describe techniques to recognize a broad range of implic...