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» Power Optimization of Variable Voltage Core-Based Systems
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CASES
2007
ACM
13 years 11 months ago
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. ...
TVLSI
2002
102views more  TVLSI 2002»
13 years 7 months ago
Low-power data forwarding for VLIW embedded architectures
In this paper, we propose a low-power approach to the design of embedded very long instruction word (VLIW) processor architectures based on the forwarding (or bypassing) hardware, ...
Mariagiovanna Sami, Donatella Sciuto, Cristina Sil...
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
13 years 11 months ago
TAPHS: thermal-aware unified physical-level and high-level synthesis
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...
Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang, Robert...
ISLPED
2009
ACM
184views Hardware» more  ISLPED 2009»
14 years 2 months ago
Online work maximization under a peak temperature constraint
Increasing power densities and the high cost of low thermal resistance packages and cooling solutions make it impractical to design processors for worst-case temperature scenarios...
Thidapat Chantem, Xiaobo Sharon Hu, Robert P. Dick
ISLPED
2010
ACM
170views Hardware» more  ISLPED 2010»
13 years 7 months ago
Low-power sub-threshold design of secure physical unclonable functions
The unique and unpredictable nature of silicon enables the use of physical unclonable functions (PUFs) for chip identification and authentication. Since the function of PUFs depen...
Lang Lin, Daniel E. Holcomb, Dilip Kumar Krishnapp...