430 search results - page 54 / 86 » Power Optimized Combinational Logic Design |
ISLPED
2010
ACM
13 years 10 months ago
2010
ACM
Booth encoding is believed to yield faster multiplier designs with higher energy consumption. 16x16-bit Booth and NonBooth multipliers are analyzed in energy and delay space under...
SPAA
2010
ACM
14 years 2 months ago
2010
ACM
Energy consumption by computer systems has emerged as an important concern. However, the energy consumed in executing an algorithm cannot be inferred from its performance alone: i...
ASPDAC
2008
ACM
14 years 2 days ago
2008
ACM
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
MOBICOM
2003
ACM
14 years 3 months ago
2003
ACM
Reducing the energy consumption by wireless communication devices is perhaps the most important issue in the widely-deployed and exponentially-growing IEEE 802.11 Wireless LANs (W...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
Dynamic voltage scaling (DVS) is a well-known low power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time...