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ASPDAC
2007
ACM
129views Hardware» more  ASPDAC 2007»
14 years 2 months ago
ECO-system: Embracing the Change in Placement
In a realistic design flow, circuit and system optimizations must interact with physical aspects of the design. For example, improvements in timing and power may require replacing ...
Jarrod A. Roy, Igor L. Markov
SBIA
2010
Springer
13 years 8 months ago
High-Level Modeling of Component-Based CSPs
Most of modern constraint modeling languages combine rich constraint languages with mathematical notations to tackle combinatorial optimization problems. Our purpose is to introduc...
Raphaël Chenouard, Laurent Granvilliers, Rica...
MTDT
2003
IEEE
105views Hardware» more  MTDT 2003»
14 years 3 months ago
A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...
Rei-Fu Huang, Li-Ming Denq, Cheng-Wen Wu, Jin-Fu L...
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 7 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
SPIN
2000
Springer
14 years 1 months ago
Verification and Optimization of a PLC Control Schedule
Abstract. We report on the use of model checking techniques for both the verification of a process control program and the derivation of optimal control schedules. Most of this wor...
Ed Brinksma, Angelika Mader