734 search results - page 103 / 147 » Power balanced pipelines |
DAC
2007
ACM
14 years 11 months ago
2007
ACM
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
VLSID
2008
IEEE
14 years 10 months ago
2008
IEEE
Real-time embedded systems increasingly rely on dynamic power management to balance between power and performance goals. In this paper, we present a technique for continuous frequ...
HPCA
2005
IEEE
14 years 10 months ago
2005
IEEE
Due to increasing power densities, both on-chip average and peak temperatures are fast becoming a serious bottleneck in processor design. This is due to the cost of removing the h...
MOBIHOC
2008
ACM
14 years 9 months ago
2008
ACM
Due to the long propagation delay and high error rate of acoustic channels, it is very challenging to provide reliable data transfer for time-critical applications in an energy-ef...
ICCD
2004
IEEE
14 years 7 months ago
2004
IEEE
Networks-on-Chip (NoC), a new SoC paradigm, has been proposed as a solution to mitigate complex on-chip interconnect problems. NoC architecture consists of a collection of IP core...