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DAC
2005
ACM
14 years 9 months ago
Incremental exploration of the combined physical and behavioral design space
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is exacerbated by high-level design automation tools that ignore increasingly impo...
Zhenyu (Peter) Gu, Jia Wang, Robert P. Dick, Hai Z...
EH
2004
IEEE
117views Hardware» more  EH 2004»
14 years 8 days ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
IEEEPACT
2007
IEEE
14 years 2 months ago
Paceline: Improving Single-Thread Performance in Nanoscale CMPs through Core Overclocking
Under current worst-case design practices, manufacturers specify conservative values for processor frequencies in order to guarantee correctness. To recover some of the lost perfo...
Brian Greskamp, Josep Torrellas
ICC
2007
IEEE
14 years 2 months ago
Low-Complexity EM-based Joint CFO and IQ imbalance Acquisition
—New air interfaces are currently being developed to meet the high spectral efficiency requirements of the emerging wireless communication systems. In this context, OFDM is cons...
François Horlin, André Bourdoux, Edu...
HICSS
2003
IEEE
151views Biometrics» more  HICSS 2003»
14 years 1 months ago
A Simple GSPN for Modeling Common Mode Failures in Critical Infrastructures
It is now apparent that our nation’s infrastructures and essential utilities have been optimized for reliability in benign operating environments. As such, they are susceptible ...
Axel W. Krings, Paul W. Oman