For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
A communication-centric design approach, Networks on Chips (NoCs), has emerged as the design paradigm for designing a scalable communication infrastructure for future Systems on C...
Srinivasan Murali, Martijn Coenen, Andrei Radulesc...
As the power of mobile devices continues to grow, and the range of resources accessible via wireless networks expands, there is an increasing need to offer services to users in a ...
Markus Aleksy, Colin Atkinson, Philipp Bostan, Tho...
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
Business rules provide an elegant solution to manage dynamic business logic by separating business knowledge from its implementation logic. The drawback of most existing business ...
Christoph Nagl, Florian Rosenberg, Schahram Dustda...