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DATE
2007
IEEE
109views Hardware» more  DATE 2007»
14 years 4 months ago
System level clock tree synthesis for power optimization
The clock tree is the interconnect net on Systems-on-Chip (SoCs) with the heaviest load and consumes up to 40% of the overall power budget. Substantial savings of the overall powe...
Saif Ali Butt, Stefan Schmermbeck, Jurij Rosenthal...
ICASSP
2011
IEEE
13 years 1 months ago
Fairness and throughput enhancing user-combining scheme based on Superposition Coding for a wireless relay system
A relay system where two users are served by one Base Station (BS) and one Relay Station (RS) is focused on. A scheme based on Superposition Coding (SC) for Decodeand-Forward (DF)...
Megumi Kaneko, Kazunori Hayashi, Hideaki Sakai
DAC
2000
ACM
14 years 11 months ago
Power analysis of embedded operating systems
The increasing complexity and software content of embedded systems has led to the common use of sophisticated system software that helps applications use the underlying hardware r...
Robert P. Dick, Ganesh Lakshminarayana, Anand Ragh...
TWC
2008
238views more  TWC 2008»
13 years 10 months ago
Downlink resource allocation in multi-carrier systems: frequency-selective vs. equal power allocation
In this paper, a dynamic subcarrier and power allocation problem is considered in the context of asymptotic utility maximization in multi-carrier systems. Using the gradient-based...
Hyang-Won Lee, Song Chong
JSA
2000
96views more  JSA 2000»
13 years 9 months ago
Design techniques for low-power systems
Portable products are being used increasingly. Because these systems are battery powered, reducing power consumption is vital. In this report we give the properties of low power d...
Paul J. M. Havinga, Gerard J. M. Smit