318 search results - page 44 / 64 » Power minimization for dynamic PLAs |
133
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ASPDAC
2004
ACM
15 years 9 months ago
2004
ACM
As gate delays decrease faster than wire delays for each technology generation, buffer insertion becomes a popular method to reduce the interconnect delay. Several modern buffer in...
152
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MDM
2009
Springer
15 years 10 months ago
2009
Springer
— This work aims at minimize the cost of answering snapshot multi-predicate queries in high-communication-cost networks. High-communication-cost (HCC) networks is a family of net...
134
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ICIP
2007
IEEE
16 years 5 months ago
2007
IEEE
Nonnegative Matrix Factorization (NMF) is a powerful decomposition tool which has been used in several content representation applications recently. However, there are some diffic...
165
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RTAS
2002
IEEE
15 years 9 months ago
2002
IEEE
Dynamic voltage scaling (DVS) is being increasingly used for power management in embedded systems. Energy is a scarce resource in embedded real-time systems and energy consumption...
139
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ASPLOS
2008
ACM
15 years 6 months ago
2008
ACM
Extracting high-performance from the emerging Chip Multiprocessors (CMPs) requires that the application be divided into multiple threads. Each thread executes on a separate core t...