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» Power minimization using control generated clocks
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ICNP
2007
IEEE
14 years 3 months ago
PSM-throttling: Minimizing Energy Consumption for Bulk Data Communications in WLANs
— While the 802.11 power saving mode (PSM) and its enhancements can reduce power consumption by putting the wireless network interface (WNI) into sleep as much as possible, they ...
Enhua Tan, Lei Guo, Songqing Chen, Xiaodong Zhang
CL
2010
Springer
13 years 9 months ago
SystemJ: A GALS language for system level design
In this paper we present the syntax, semantics, and compilation of a new system-level programming language called SystemJ. SystemJ is a multiclock language supporting the Globally...
Avinash Malik, Zoran Salcic, Partha S. Roop, Alain...
MICRO
2002
IEEE
124views Hardware» more  MICRO 2002»
14 years 1 months ago
Optimizing pipelines for power and performance
During the concept phase and definition of next generation high-end processors, power and performance will need to be weighted appropriately to deliver competitive cost/performan...
Viji Srinivasan, David Brooks, Michael Gschwind, P...
DSN
2008
IEEE
14 years 3 months ago
Automatic security assessment of critical cyber-infrastructures
This research investigates the automation of security assessment of the static and dynamic properties of cyberinfrastructures, with emphasis on the electrical power grid. We descr...
Zahid Anwar, Ravinder Shankesi, Roy H. Campbell
ERSA
2009
149views Hardware» more  ERSA 2009»
13 years 6 months ago
Hardware-Optimized Ziggurat Algorithm for High-Speed Gaussian Random Number Generators
Many scientific and engineering applications, which are increasingly being ported from software to reconfigurable platforms, require Gaussian-distributed random numbers. Thus, the...
Hassan Edrees, Brian Cheung, McCullen Sandora, Dav...