Sciweavers

732 search results - page 69 / 147
» Power minimization using control generated clocks
Sort
View
ATVA
2005
Springer
111views Hardware» more  ATVA 2005»
14 years 2 months ago
Model Checking Prioritized Timed Automata
Abstract. Priorities are often used to resolve conflicts in timed systems. However, priorities are not directly supported by state-of-art model checkers. Often, a designer has to ...
Shang-Wei Lin, Pao-Ann Hsiung, Chun-Hsian Huang, Y...
ISPD
1997
ACM
100views Hardware» more  ISPD 1997»
14 years 29 days ago
A pseudo-hierarchical methodology for high performance microprocessor design
- This paper reports on a highly effective methodology to construct complex high performance microprocessors. Critical aspects of the methodology include an integrated database for...
A. Bertolet, K. Carpenter, Keith M. Carrig, Albert...
ICCD
2004
IEEE
115views Hardware» more  ICCD 2004»
14 years 5 months ago
Generating Monitor Circuits for Simulation-Friendly GSTE Assertion Graphs
Formal and dynamic (simulation, emulation, etc.) verification techniques are both needed to deal with the overall challenge of verification. Ideally, the same specification/tes...
Kelvin Ng, Alan J. Hu, Jin Yang
WSCG
2001
114views more  WSCG 2001»
13 years 10 months ago
Interactive Data Exploration with Customized Glyphs
We present a visualization system allowing non-programmers to visualize, explore, and analyze unknown multivariate data by designing an appropriate glyph representation with minim...
Martin Kraus, Thomas Ertl
SIGGRAPH
1992
ACM
14 years 25 days ago
Generative modeling: a symbolic system for geometric modeling
This paper discusses a new, symbolic approach to geometric modeling called generative modeling. The approach allows specification, rendering, and analysis of a wide variety of sha...
John M. Snyder, James T. Kajiya