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» Power scalable processing using distributed arithmetic
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TVLSI
2002
119views more  TVLSI 2002»
13 years 9 months ago
Inductive properties of high-performance power distribution grids
Abstract--The design of high integrity, area efficient power distribution grids has become of practical importance as the portion of on-chip interconnect resources dedicated to pow...
Andrey V. Mezhiba, Eby G. Friedman
ICDCS
2012
IEEE
12 years 8 days ago
Scalable Name Lookup in NDN Using Effective Name Component Encoding
—Name-based route lookup is a key function for Named Data Networking (NDN). The NDN names are hierarchical and have variable and unbounded lengths, which are much longer than IPv...
Yi Wang, Keqiang He, Huichen Dai, Wei Meng, Junche...
SBCCI
2003
ACM
96views VLSI» more  SBCCI 2003»
14 years 3 months ago
SoCIN: A Parametric and Scalable Network-on-Chip
Networks-on-Chip (NoCs) interconnection architectures to be used in future billion-transistor Systems-on-Chip (SoCs) meet the major communication requirements of these systems, of...
Cesar Albenes Zeferino, Altamiro Amadeu Susin
ICCAD
2003
IEEE
221views Hardware» more  ICCAD 2003»
14 years 6 months ago
Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems
Abstract— Dynamic voltage scaling (DVS) is a powerful technique for reducing dynamic power consumption in a computing system. However, as technology feature size continues to sca...
Le Yan, Jiong Luo, Niraj K. Jha
HPDC
2008
IEEE
14 years 4 months ago
FaTLease: scalable fault-tolerant lease negotiation with paxos
A lease is a token which grants its owner exclusive access to a resource for a defined span of time. In order to be able to tolerate failures, leases need to be coordinated by di...
Felix Hupfeld, Björn Kolbeck, Jan Stender, Mi...