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TCAD
2010
136views more  TCAD 2010»
13 years 4 months ago
Bounded Model Debugging
Design debugging is a major bottleneck in modern VLSI design flows as both the design size and the length of the error trace contribute to its inherent complexity. With typical des...
Brian Keng, Sean Safarpour, Andreas G. Veneris
ICCAD
2001
IEEE
111views Hardware» more  ICCAD 2001»
14 years 7 months ago
Congestion Aware Layout Driven Logic Synthesis
In this paper, we present novel algorithms that effectively combine physical layout and early logic synthesis to improve overall design quality. In addition, we employ partitionin...
Thomas Kutzschebauch, Leon Stok
ICSM
2009
IEEE
14 years 4 months ago
Understanding source package organization using the hybrid model
Within a large, object-oriented software system it is common to partition the classes into a set of packages, which implicitly serve as a set of coarsely-grained logical design un...
Xinyi Dong, Michael W. Godfrey
TCSV
2011
13 years 5 months ago
Formulating Team-Sport Video Summarization as a Resource Allocation Problem
—We propose a flexible framework to summarize team-sport videos that have been originally produced for broadcast purposes. The framework is able to integrate both the knowledge ...
Fan Chen, Christophe De Vleeschouwer
ICASSP
2011
IEEE
13 years 1 months ago
Using residual vector quantization for image content classification
Multistage residual vector quantizers (RVQ) with optimal direct sum decoder codebooks have been successfully designed and implemented for data compression. Due to its multistage s...
Syed Irteza Ali Khan, Christopher F. Barnes