Sciweavers

181 search results - page 24 / 37
» Power-Efficient Implementations of Multimedia Applications o...
Sort
View

Publication
266views
13 years 24 days ago
NeuFlow: A Runtime Reconfigurable Dataflow Processor for Vision
In this paper we present a scalable dataflow hard- ware architecture optimized for the computation of general- purpose vision algorithms—neuFlow—and a dataflow compiler—luaFl...
C. Farabet, B. Martini, B. Corda, P. Akselrod, E. ...
ASAP
2007
IEEE
157views Hardware» more  ASAP 2007»
13 years 11 months ago
Automatic Generation and Optimisation of Reconfigurable Financial Monte-Carlo Simulations
Monte-Carlo simulations are used in many applications, such as option pricing and portfolio evaluation. Due to their high computational load and intrinsic parallelism, they are id...
David B. Thomas, Jacob A. Bower, Wayne Luk
ESTIMEDIA
2007
Springer
14 years 1 months ago
Run-time Task Overlapping on Multiprocessor Platforms
Today’s embedded applications often consist of multiple concurrent tasks. These tasks are decomposed into subtasks which are in turn assigned and scheduled on multiple different...
Zhe Ma, Daniele Paolo Scarpazza, Francky Catthoor
ERSA
2010
115views Hardware» more  ERSA 2010»
13 years 5 months ago
Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware
Research in communication networks has shown that the Internet architecture is not sufficient for modern communication areas such as the interconnection networks of super computing...
Enno Lübbers, Marco Platzner, Christian Pless...
VLSID
2005
IEEE
128views VLSI» more  VLSID 2005»
14 years 7 months ago
On-Line Synthesis for Partially Reconfigurable FPGAs
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
Renqiu Huang, Ranga Vemuri