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JSS
2006
62views more  JSS 2006»
13 years 8 months ago
Designing state-based systems with entity-life modeling
This article introduces the entity-life modeling (ELM) design approach for multithread software. The article focuses on problems that can be described by state machines with assoc...
Bo Sandén, Janusz Zalewski
ICPP
2009
IEEE
14 years 3 months ago
Mapping the FDTD Application to Many-Core Chip Architectures
—This paper reports a study of mapping the Finite Difference Time Domain (FDTD) application to the IBM Cyclops64 (C64) many-core chip architecture [1]. C64 is chosen for this stu...
Daniel Orozco, Guang R. Gao
CGO
2008
IEEE
14 years 3 months ago
Compiling for vector-thread architectures
Vector-thread (VT) architectures exploit multiple forms of parallelism simultaneously. This paper describes a compiler for the Scale VT architecture, which takes advantage of the ...
Mark Hampton, Krste Asanovic
ACSAC
2006
IEEE
14 years 2 months ago
Covert and Side Channels Due to Processor Architecture
Information leakage through covert channels and side channels is becoming a serious problem, especially when these are enhanced by modern processor architecture features. We show ...
Zhenghong Wang, Ruby B. Lee
ASPDAC
2007
ACM
121views Hardware» more  ASPDAC 2007»
14 years 22 days ago
Approximation Algorithm for Process Mapping on Network Processor Architectures
The high performance requirements of networking applications has led to the advent of programmable network processor (NP) architectures that incorporate symmetric multiprocessing, ...
Christopher Ostler, Karam S. Chatha, Goran Konjevo...