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ISCA
1996
IEEE
102views Hardware» more  ISCA 1996»
14 years 24 days ago
Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor
Simultaneous multithreading is a technique that permits multiple independent threads to issue multiple instructions each cycle. In previous work we demonstrated the performance po...
Dean M. Tullsen, Susan J. Eggers, Joel S. Emer, He...
EUROSYS
2011
ACM
13 years 3 days ago
Finding complex concurrency bugs in large multi-threaded applications
Parallel software is increasingly necessary to take advantage of multi-core architectures, but it is also prone to concurrency bugs which are particularly hard to avoid, find, an...
Pedro Fonseca, Cheng Li, Rodrigo Rodrigues
MICRO
2010
IEEE
115views Hardware» more  MICRO 2010»
13 years 7 months ago
Per-Thread Cycle Accounting
This paper proposes a cycle accounting architecture for Simultaneous Multithreading (SMT) processors that estimates the execution times for each of the threads had they been execu...
Stijn Eyerman, Lieven Eeckhout
JUCS
2000
120views more  JUCS 2000»
13 years 8 months ago
Execution and Cache Performance of the Scheduled Dataflow Architecture
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
IEEEPACT
2007
IEEE
14 years 2 months ago
FAME: FAirly MEasuring Multithreaded Architectures
Nowadays, multithreaded architectures are becoming more and more popular. In order to evaluate their behavior, several methodologies and metrics have been proposed. A methodology ...
Javier Vera, Francisco J. Cazorla, Alex Pajuelo, O...