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IISWC
2006
IEEE
14 years 4 months ago
Application-Aware Power Management
Abstract— This paper presents our approach for applicationaware power management. We combine continuous monitoring of critical workload indicators, online power and performance m...
Karthick Rajamani, Heather Hanson, Juan Rubio, Sor...
FPL
2009
Springer
106views Hardware» more  FPL 2009»
14 years 2 months ago
Low power techniques for Motion Estimation hardware
Motion Estimation (ME) is the most computationally intensive and the most power consuming part of video compression and video enhancement systems. In this paper, we propose a nove...
Caglar Kalaycioglu, Onur C. Ulusel, Ilker Hamzaogl...
ISLPED
1999
ACM
177views Hardware» more  ISLPED 1999»
14 years 2 months ago
Low power synthesis of dual threshold voltage CMOS VLSI circuits
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...
Vijay Sundararajan, Keshab K. Parhi
HIPC
2009
Springer
13 years 8 months ago
Three scalable approaches to improving many-core throughput for a given peak power budget
Recently proposed techniques for peak power management [18] involve centralized decisionmaking and assume quick evaluation of the various power management states. These techniques...
John Sartori, Rakesh Kumar
FPL
2008
Springer
129views Hardware» more  FPL 2008»
13 years 11 months ago
Power reduction techniques for Dynamically Reconfigurable Processor Arrays
The power consumption of Dynamically Reconfigurable Processing Array (DRPA) is quantitatively analyzed by using a real chip layout and applications taking into account the reconfi...
Takashi Nishimura, Keiichiro Hirai, Yoshiki Saito,...