492 search results - page 32 / 99 » Predictable performance in SMT processors |
EUROPAR
1997
Springer
14 years 1 months ago
1997
Springer
The large latency of memory accesses is a major obstacle in obtaining high processor utilization in large scale shared-memory multiprocessors. Access to remote memory is likely to ...
TCAD
2010
13 years 3 months ago
2010
- This paper presents a supervised learning based power management framework for a multi-processor system, where a power manager (PM) learns to predict the system performance state...
ECRTS
2005
IEEE
14 years 2 months ago
2005
IEEE
Branch prediction mechanisms are becoming commonplace within current generation processors. Dynamic branch predictors, albeit able to predict branches quite accurately in average,...
IEEEPACT
2002
IEEE
14 years 1 months ago
2002
IEEE
Memory dependence prediction allows out-of-order issue processors to achieve high degrees of instruction level parallelism by issuing load instructions at the earliest time withou...
IPPS
2003
IEEE
14 years 2 months ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...