492 search results - page 42 / 99 » Predictable performance in SMT processors |
ISCA
2012
IEEE
11 years 11 months ago
2012
IEEE
Single-ISA heterogeneous multi-core processors are typically composed of small (e.g., in-order) power-efficient cores and big (e.g., out-of-order) high-performance cores. The eff...
ICNS
2007
IEEE
14 years 3 months ago
2007
IEEE
Abstract— The study of protocol behavior and traffic characteristics in a simulated environment is commonly supported by ad-hoc or general purpose simulators (e.g., Opnet, NS-2)...
JSA
2007
2007
Application of deterministic and stochastic Petri-Nets for performance modeling of NoC architectures
13 years 8 months ago
The design of appropriate communication architectures for complex Systems-on-Chip (SoC) is a challenging task. One promising alternative to solve these problems are Networks-on-Ch...
JILP
2000
13 years 8 months ago
2000
In today's wide-issue processors, even small branch-misprediction rates introduce substantial performance penalties. Worse yet, inadequate branch prediction creates a bottlen...
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
— In this study we introduce NetBench, a benchmarking suite for network processors. NetBench contains a total of 9 applications that are representative of commercial applications...