492 search results - page 56 / 99 » Predictable performance in SMT processors |
ISHPC
2003
Springer
14 years 2 months ago
2003
Springer
Instruction issue consumes a large amount of energy in out of order processors, largely in the wakeup logic. Proposed solutions to the problem require prediction or additional hard...
MICRO
1994
IEEE
14 years 27 days ago
1994
IEEE
High performance architectures have always had to deal with the performance-limiting impact of branch operations. Microprocessor designs are going to have to deal with this proble...
ISHPC
2000
Springer
14 years 11 days ago
2000
Springer
Deeply pipelined high performance processors require highly accurate branch prediction to drive their instruction fetch. However there remains a class of events which are not easi...
ISCA
1998
IEEE
14 years 1 months ago
1998
IEEE
Indirect branch prediction is likely to become increasingly important in the future because indirect branches occur more frequently in object-oriented programs. With misprediction ...
CASES
2006
ACM
14 years 16 days ago
2006
ACM
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...