492 search results - page 58 / 99 » Predictable performance in SMT processors |
HPCA
2006
IEEE
14 years 9 months ago
2006
IEEE
Allowing loads to issue out-of-order with respect to earlier unresolved store addresses is very important for extracting parallelism in large-window superscalar processors. Blindl...
USENIX
1994
13 years 10 months ago
1994
Despite impressive advances in file system throughput resulting from technologies such as high-bandwidth networks and disk arrays, file system latency has not improved and in many...
AINA
2009
IEEE
14 years 3 months ago
2009
IEEE
The architectures which support modern supercomputing machinery are as diverse today, as at any point during the last twenty years. The variety of processor core arrangements, thr...
IEEEINTERACT
2002
IEEE
14 years 1 months ago
2002
IEEE
Smaller input data sets such as the test and the train input sets are commonly used in simulation to estimate the impact of architecture/micro-architecture features on the perform...
JILP
2000
13 years 8 months ago
2000
Load latency remains a signi cant bottleneck in dynamically scheduled pipelined processors. Load speculation techniques have been proposed to reduce this latency. Dependence Predi...