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» Predictable performance in SMT processors
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HPCA
2003
IEEE
14 years 8 months ago
Deterministic Clock Gating for Microprocessor Power Reduction
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykuma...
OSDI
2006
ACM
14 years 7 months ago
Connection Handoff Policies for TCP Offload Network Interfaces
This paper presents three policies for effectively utilizing TCP offload network interfaces that support connection handoff. These policies allow connection handoff to reduce the ...
Hyong-youb Kim, Scott Rixner
PPOPP
2010
ACM
14 years 4 months ago
Modeling advanced collective communication algorithms on cell-based systems
This paper presents and validates performance models for a variety of high-performance collective communication algorithms for systems with Cell processors. The systems modeled in...
Qasim Ali, Samuel P. Midkiff, Vijay S. Pai
IPPS
1998
IEEE
13 years 12 months ago
Design, Implementation and Evaluation of Parallel Pipelined STAP on Parallel Computers
This paper presents performance results for the design and implementation of parallel pipelined Space-Time Adaptive Processing (STAP) algorithms on parallel computers. In particul...
Alok N. Choudhary, Wei-keng Liao, Donald Weiner, P...
HPCA
2004
IEEE
14 years 8 months ago
The Thrifty Barrier: Energy-Aware Synchronization in Shared-Memory Multiprocessors
Much research has been devoted to making microprocessors energy-efficient. However, little attention has been paid to multiprocessor environments where, due to the co-operative na...
Jian Li, José F. Martínez, Michael C...