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DATE
2008
IEEE
114views Hardware» more  DATE 2008»
14 years 2 months ago
Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors
—The contribution of memory latency to execution time continues to increase, and latency hiding mechanisms become ever more important for efficient processor design. While high-...
Sanghyun Park, Aviral Shrivastava, Yunheung Paek
AIPS
2007
13 years 10 months ago
Monitoring Plan Optimality During Execution
A great deal of research has addressed the problem of generating optimal plans, but these plans are of limited use in circumstances where noisy sensors, unanticipated exogenous ac...
Christian Fritz, Sheila A. McIlraith
ATAL
2010
Springer
13 years 8 months ago
Learning multirobot joint action plans from simultaneous task execution demonstrations
The central problem of designing intelligent robot systems which learn by demonstrations of desired behaviour has been largely studied within the field of robotics. Numerous archi...
Murilo Fernandes Martins, Yiannis Demiris
FORMATS
2007
Springer
13 years 11 months ago
Combining Formal Verification with Observed System Execution Behavior to Tune System Parameters
Resource limited DRE (Distributed Real-time Embedded) systems can benefit greatly from dynamic adaptation of system parameters. We propose a novel approach that employs iterative t...
Minyoung Kim, Mark-Oliver Stehr, Carolyn L. Talcot...
CLUSTER
2007
IEEE
14 years 1 months ago
Network performance model for TCP/IP based cluster computing
— A new communication model, called the PlogPT model, is proposed to predict communication performance in a commodity cluster where computing nodes communicate using TCP/IP. This...
Akihiro Nomura, Hiroya Matsuba, Yutaka Ishikawa