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» Predicting the Performance of Wide Area Data Transfers
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IPPS
2007
IEEE
14 years 2 months ago
A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
Ehsan Atoofian, Amirali Baniasadi
IPPS
2005
IEEE
14 years 1 months ago
Performance Analysis of MPI Collective Operations
Previous studies of application usage show that the performance of collective communications are critical for high-performance computing and are often overlooked when compared to ...
Jelena Pjesivac-Grbovic, Thara Angskun, George Bos...
RSS
2007
151views Robotics» more  RSS 2007»
13 years 9 months ago
Adaptive Non-Stationary Kernel Regression for Terrain Modeling
— Three-dimensional digital terrain models are of fundamental importance in many areas such as the geo-sciences and outdoor robotics. Accurate modeling requires the ability to de...
Tobias Lang, Christian Plagemann, Wolfram Burgard
DAC
2000
ACM
14 years 8 months ago
Multiple Si layer ICs: motivation, performance analysis, and design implications
Continuous scaling of VLSI circuits is reducing gate delays but rapidly increasing interconnect delays. Semiconductor Industry Association (SIA) roadmap predicts that, beyond the ...
Shukri J. Souri, Kaustav Banerjee, Amit Mehrotra, ...
IPPS
1998
IEEE
14 years 4 days ago
Pin-Down Cache: A Virtual Memory Management Technique for Zero-Copy Communication
The overhead of copying data through the central processor by a message passing protocol limits data transfer bandwidth. If the network interface directly transfers the user'...
Hiroshi Tezuka, Francis O'Carroll, Atsushi Hori, Y...