Register renaming is a widely used technique to remove false data dependencies in contemporary superscalar microprocessors. The register rename logic includes a mapping table that ...
Data communications between producer instructions and consumer instructions through memory incur extra delays that degrade processor performance. In this paper, we introduce a new...
+ Modern network processors employ multi-threading to allow concurrency amongst multiple packet processing tasks. We studied the properties of applications running on the network p...
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Tight data- and timing constraints are imposed by communication and multimedia applications. The architecture for the embedded processor imply resource constraints. Instead of ran...
Carlos A. Alba Pinto, Bart Mesman, Jochen A. G. Je...