Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
Process algebraic specifications can provide useful support for the architectural design of software systems due to the possibility of analyzing their properties. In addition to th...
This paper gives an overview of the ArchWare European Project1 . The broad scope of ArchWare is to respond to the ever-present demand for software systems that are capable of accom...
We address the verification problem of finite-state concurrent programs running under weak memory models. These models capture the reordering of program (read and write) operation...
Ahmed Bouajjani, Madanlal Musuvathi, Mohamed Faouz...
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...