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ISQED
2008
IEEE
153views Hardware» more  ISQED 2008»
14 years 1 months ago
Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding
Clock meshes have found increasingly wide applications in today’s high-performance IC designs. The inherent routing redundancies associated with clock meshes lead to improved cl...
Xiaoji Ye, Min Zhao, Rajendran Panda, Peng Li, Jia...
WCNC
2008
IEEE
14 years 1 months ago
On Reducing Broadcast Transmission Cost and Redundancy in Ad Hoc Wireless Networks Using Directional Antennas
—Using directional antennas to conserve bandwidth and energy consumption in ad hoc wireless networks has attracted much attention of the research community in recent years. Howev...
Ling Ding, Yifeng Shao, Minglu Li
ADHOCNOW
2008
Springer
14 years 1 months ago
Adapting BitTorrent to Wireless Ad Hoc Networks
Abstract. BitTorrent is one of the Internet’s most efficient content distribution protocols. It is known to perform very well over the wired Internet where end-to-end performance...
Mohamed Karim Sbai, Chadi Barakat, Jaeyoung Choi, ...
ICC
2007
IEEE
14 years 1 months ago
Optical WDM Network Planning Using Heterogeneous Multi-granularity OXCs
Multigranular optical WDM network aims to reduce network cost by grouping multiple wavelengths and then switching those wavelengths together at waveband or fiber levels. To configu...
Hong-Hsu Yen, Frank Yeong-Sung Lin, Steven S. W. L...
ICNP
2007
IEEE
14 years 1 months ago
HEXA: Compact Data Structures for Faster Packet Processing
—Data structures representing directed graphs with edges labeled by symbols from a finite alphabet are used to implement packet processing algorithms used in a variety of network...
Sailesh Kumar, Jonathan S. Turner, Patrick Crowley...