On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
Yunlian Jiang, Eddy Z. Zhang, Kai Tian, Xipeng She...
Writing shared-memory parallel programs is error-prone. Among the concurrency errors that programmers often face are atomicity violations, which are especially challenging. They h...
Brandon Lucia, Joseph Devietti, Karin Strauss, Lui...
Static program checking tools can find many serious bugs in software, but due to analysis limitations they also frequently emit false error reports. Such false positives can easi...
Ted Kremenek, Ken Ashcraft, Junfeng Yang, Dawson R...
Abstract—Secondary spectrum access is emerging as a promising approach for mitigating the spectrum scarcity in wireless networks. Coordinated spectrum access for secondary users ...
vel Meta-Reasoning with Higher-Order Abstract Syntax Alberto Momigliano, Simon Ambler. A Normalisation Result for Higher-Order Calculi with Explicit Substitutions Eduardo Bonelli. ...