1225 search results - page 189 / 245 » Process Improvement for Small Organizations |
MICRO
2008
IEEE
14 years 4 months ago
2008
IEEE
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
HPCA
2012
IEEE
12 years 5 months ago
2012
IEEE
Main memory latencies have always been a concern for system performance. Given that reads are on the critical path for CPU progress, reads must be prioritized over writes. However...
SASO
2009
IEEE
14 years 4 months ago
2009
IEEE
We investigate a generic self-adaptation method to reduce the design effort for System-on-Chip (SoC). Previous self-adaptation solutions at chip-level use circuitries which have b...
OTM
2009
Springer
14 years 4 months ago
2009
Springer
Complex event processing (CEP) is a software architecture paradigm that aims at low latency, high throughput, and quick adaptability of applications for supporting and improving ev...
BMCBI
2010
13 years 10 months ago
2010
Background: Mathematical modeling is being applied to increasingly complex biological systems and datasets; however, the process of analyzing and calibrating against experimental ...