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MICRO
2009
IEEE
147views Hardware» more  MICRO 2009»
14 years 3 months ago
Complexity effective memory access scheduling for many-core accelerator architectures
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
George L. Yuan, Ali Bakhoda, Tor M. Aamodt
ICPP
2005
IEEE
14 years 2 months ago
Service Migration in Distributed Virtual Machines for Adaptive Grid Computing
Computational grids can integrate geographically distributed resources into a seamless environment. To facilitate managing these heterogenous resources, the virtual machine gy pro...
Song Fu, Cheng-Zhong Xu
IEEEPACT
2005
IEEE
14 years 2 months ago
Characterization of TCC on Chip-Multiprocessors
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi...
OSDI
1994
ACM
13 years 10 months ago
Experiences with Locking in a NUMA Multiprocessor Operating System Kernel
We describe the lockingarchitecture of a new operating system, HURRICANE, designed for large scale shared-memory multiprocessors. Many papers already describe kernel lockingtechni...
Ronald C. Unrau, Orran Krieger, Benjamin Gamsa, Mi...
RTSS
2009
IEEE
14 years 3 months ago
Multiprocessor Extensions to Real-Time Calculus
Abstract—Many embedded platforms consist of a heterogeneous collection of processing elements, memory modules, and communication subsystems. These components often implement diff...
Hennadiy Leontyev, Samarjit Chakraborty, James H. ...