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ISCA
2006
IEEE
162views Hardware» more  ISCA 2006»
14 years 1 months ago
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
Feihui Li, Chrysostomos Nicopoulos, Thomas D. Rich...
SBACPAD
2003
IEEE
111views Hardware» more  SBACPAD 2003»
14 years 24 days ago
Boosting Performance for I/O-Intensive Workload by Preemptive Job Migrations in a Cluster System
Load balancing in a cluster system has been investigated extensively, mainly focusing on the effective usage of global CPU and memory resources. However, if a significant portion ...
Xiao Qin, Hong Jiang, Yifeng Zhu, David R. Swanson
JSA
2007
162views more  JSA 2007»
13 years 7 months ago
Exploration of distributed shared memory architectures for NoC-based multiprocessors
Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia applications. To enable MP-SoC platforms, scalable communication-centric inter...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
EMSOFT
2008
Springer
13 years 9 months ago
Portioned EDF-based scheduling on multiprocessors
This paper presents an EDF-based algorithm, called Earliest Deadline Deferrable Portion (EDDP), for efficient scheduling of recurrent real-time tasks on multiprocessor systems. Th...
Shinpei Kato, Nobuyuki Yamasaki
TC
1998
13 years 7 months ago
Performance Evaluation and Cost Analysis of Cache Protocol Extensions for Shared-Memory Multiprocessors
—We evaluate three extensions to directory-based cache coherence protocols in shared-memory multiprocessors. These extensions are aimed at reducing the penalties associated with ...
Fredrik Dahlgren, Michel Dubois, Per Stenströ...