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TVLSI
2008
120views more  TVLSI 2008»
13 years 8 months ago
An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
Dongwan Shin, Andreas Gerstlauer, Rainer Döme...
CODES
2006
IEEE
14 years 2 months ago
Automatic run-time extraction of communication graphs from multithreaded applications
Embedded system synthesis, multiprocessor synthesis, and thread assignment policy design all require detailed knowledge of the runtime communication patterns among different threa...
Ai-Hsin Liu, Robert P. Dick
EUROSYS
2006
ACM
14 years 5 months ago
Balancing power consumption in multiprocessor systems
Actions usually taken to prevent processors from overheating, such as decreasing the frequency or stopping the execution flow, also degrade performance. Multiprocessor systems, h...
Andreas Merkel, Frank Bellosa
DATE
2008
IEEE
163views Hardware» more  DATE 2008»
13 years 10 months ago
A Simulation Methodology for Worst-Case Response Time Estimation of Distributed Real-Time Systems
In this paper, we propose a simulation-based methodology for worst-case response time estimation of distributed realtime systems. Schedulability analysis produces pessimistic uppe...
Soheil Samii, Sergiu Rafiliu, Petru Eles, Zebo Pen...
DSN
2007
IEEE
14 years 3 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...