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» Processing-in-Memory: Exploring the Design Space
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RSP
2003
IEEE
103views Control Systems» more  RSP 2003»
14 years 2 months ago
An Instruction Throughput Model of Superscalar Processors
With advances in semiconductor technology, processors are becoming larger and more complex. Future processor designers will face an enormous design space, and must evaluate more a...
Tarek M. Taha, D. Scott Wills
CHI
2006
ACM
14 years 9 months ago
"Alone together?": exploring the social dynamics of massively multiplayer online games
Massively Multiplayer Online Games (MMOGs) routinely attract millions of players but little empirical data is available to assess their players' social experiences. In this p...
Nicolas Ducheneaut, Nicholas Yee, Eric Nickell, Ro...
VLSID
2008
IEEE
142views VLSI» more  VLSID 2008»
14 years 3 months ago
Incorporating PVT Variations in System-Level Power Exploration of On-Chip Communication Architectures
With the shift towards deep sub-micron (DSM) technologies, the increase in leakage power and the adoption of poweraware design methodologies have resulted in potentially significa...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
IWMM
2004
Springer
101views Hardware» more  IWMM 2004»
14 years 2 months ago
Exploring the barrier to entry: incremental generational garbage collection for Haskell
We document the design and implementation of a “production” incremental garbage collector for GHC 6.2. It builds on our earlier work (Non-stop Haskell) that exploited GHC’s ...
Andrew M. Cheadle, A. J. Field, Simon Marlow, Simo...
ASPDAC
2004
ACM
109views Hardware» more  ASPDAC 2004»
14 years 2 months ago
Resource-constrained low-power bus encoding with crosstalk delay elimination
— In deep-submicron (DSM) technology, minimizing power consumption of a bus is one of the most important design objectives in embedded system-on-chip (SoC) design. In this paper,...
Meeyoung Cha, Chun-Gi Lyuh, Taewhan Kim