The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chu...
This paper presents a methodology for monitoring security in Application Specific Instruction-set Processors (ASIPs). This is a generalized methodology for inline monitoring insec...
Roshan G. Ragel, Sri Parameswaran, Sayed Mohammad ...
This paper describes a novel technique called Embedded Test-bench Control (ETC), extensively used in the verification of Tensilica’s latest configurable processor. Conventional ...
Current tools for computer architecture design lack standard support for multi- and many-core development. We propose using circuit models to describe the multiple processor archi...
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...