2700 search results - page 143 / 540 » Processor Architectures for Ontogenesis |
132
click to vote
ICPP
2008
IEEE
15 years 11 months ago
2008
IEEE
Dual-core processors (and, to an extent, multicore processors) have been adopted in recent years to provide platforms that satisfy the performance requirements of popular multimed...
138
click to vote
ARVLSI
1997
IEEE
15 years 8 months ago
1997
IEEE
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
153
click to vote
MICRO
1991
IEEE
15 years 8 months ago
1991
IEEE
This paper examines two alternative approaches to supporting code scheduling for multiple-instruction-issue processors. One is to provide a set of non-trapping instructions so tha...
125
click to vote
ICIP
2003
IEEE
16 years 6 months ago
2003
IEEE
The Integer Cosine Transform (ICT) has been shown to be an alternative to the DCT for image processing. This paper presents a parallel-pipelined architecture of an 8x8 ICT(10, 9, ...
154
click to vote
DAC
2007
ACM
16 years 5 months ago
2007
ACM
Many embedded systems contain resource constrained microcontrollers where applications, operating system components and device drivers reside within a single address space with no...