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» Processor Architectures for Ontogenesis
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SAMOS
2004
Springer
15 years 9 months ago
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting
Today’s Application Specific Instruction-set Processor (ASIP) design methodology often employs centralized Architecture Description Language (ADL) processor models, from which s...
Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Ra...
RSP
2003
IEEE
103views Control Systems» more  RSP 2003»
15 years 9 months ago
An Instruction Throughput Model of Superscalar Processors
With advances in semiconductor technology, processors are becoming larger and more complex. Future processor designers will face an enormous design space, and must evaluate more a...
Tarek M. Taha, D. Scott Wills
ISCAS
2008
IEEE
133views Hardware» more  ISCAS 2008»
15 years 10 months ago
A hybrid self-testing methodology of processor cores
—Software-based self-test (SBST) is a promising new technology for at-speed testing of embedded processors in SoC systems. This paper introduces an effective and efficient new ho...
Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee
140
Voted
RSP
2005
IEEE
155views Control Systems» more  RSP 2005»
15 years 9 months ago
Optimization Techniques for ADL-Driven RTL Processor Synthesis
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
Oliver Schliebusch, Anupam Chattopadhyay, Ernst Ma...
CHES
2000
Springer
167views Cryptology» more  CHES 2000»
15 years 8 months ago
A High Performance Reconfigurable Elliptic Curve Processor for GF(2m)
This work proposes a processor architecture for elliptic curves cryptosystems over fields GF(2m ). This is a scalable architecture in terms of area and speed that exploits the abil...
Gerardo Orlando, Christof Paar